Powering the Future of Neurotechnology
Edge AI ASICs enabling real-time, low-power, and high-performance brain-computer interfaces and neuromodulation devices
80+
Peer-reviewed publications
10
Patents granted & pending
#1
Brain-to-Text '25 · 466 teams
453 µW
256-ch closed-loop SoC
Backed & funded by
Featured in
Revolutionary Edge AI Technology
Proprietary ASICs with on-chip neural decoding for unprecedented performance and minimal power
Ultra-Low Latency
True real-time communication with on-device processing, eliminating wireless streaming delays
Enhanced Security
Raw neural data stays protected on-implant, only shared in controlled environments
Minimal Power
Superior energy efficiency with longer battery life and reduced heat generation
Built by the People Behind the Papers
Caltech, ETH and EPFL engineering leadership — shipped silicon, an exit to Sony, and a decade of BCI research.
Dr. Masoud Farivar
Chief Executive Officer
Caltech PhD · ex-Google Scientist · ex-CEO, PlotSet
Dr. Raphael Berner
Chief Technology Officer
ETH PhD · co-founded Insightness, acquired by Sony
Prof. Mahsa Shoaran
Chief Scientific Officer
EPFL professor · Caltech postdoc · 80+ publications
Advanced Neural Interface ASICs, Silicon-Proven
Measured on Silicon
Selected results from our fabricated, peer-reviewed chips
256ch
Closed-loop neuromodulation SoC with embedded ML
453 µW total power — seizure & tremor control, finger-movement decoding
IEEE JSSC · 2022
512ch
Neural recording & decoding system on a single die
31-class handwriting decode · sub-900 µW · 2.46 mm²
IEEE JSSC · 2024
0.227µJ
Per-classification energy, versatile brain-activity classifier
1.51 µW/channel mixed-signal front-end · closed-loop stimulation
ISSCC · 2022 — Best Paper Award
91%
Brain-to-text accuracy, fully integrated MiBMI chipset
Low-latency thought-to-text conversion, entirely on-chip
ISSCC · 2024
Research & Innovation
Explore our peer-reviewed publications and intellectual property